الأبحاث المنشورة
عرض جميع الأبحاث (20)
2022
Combined two-dimensional word-based serial-in/serial-out systolic processor for multiplication and squaring over GF(2m)
CAIRO UNIV, FAC COMPUTERS & INFORMATION
The Industrial Internet of Things (IIoT): An Anomaly Identification and Countermeasure Method
WORLD SCIENTIFIC PUBL CO PTE LTD
Compact modular multiplier design for strong security capabilities in resource-limited Telehealth IoT devices
ELSEVIER
Compact hardware accelerator for field multipliers suitable for use in ultra-low power IoT edge devices
ELSEVIER
2023
Low-complexity systolic array structure for field multiplication in resource-constrained IoT nodes
ELSEVIER
2014
Low-Power, High-Speed Unified and Scalable Word-Based Radix 8 Architecture for Montgomery Modular Multiplication in GF(P) and GF(2n)
SPRINGER HEIDELBERG
2015
Systolic Array Architectures for Sunar-Koc Optimal Normal Basis Type II Multiplier
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Optimized structures of hybrid ripple carry and hierarchical carry lookahead adders
ELSEVIER SCI LTD
Efficient Scalable Serial Multiplier Over GF(2m) Based on Trinomial
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
2016
Reconfigurable Hardware Accelerator for Profile Hidden Markov Models
SPRINGER HEIDELBERG
Novel Reconfigurable Hardware Accelerator for Protein Sequence Alignment Using Smith-Waterman Algorithm
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Low space-complexity and low power semi-systolic multiplier architectures over GF(2m) based on irreducible trinomial
ELSEVIER SCIENCE BV
Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2m) Using Progressive Multiplier Reduction
SPRINGER
Efficient Scalable Digit-Serial Inverter Over GF(2m) for Ultra-Low Power Devices
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
2017
Unified systolic array architecture for finite field multiplication and inversion
PERGAMON-ELSEVIER SCIENCE LTD
Scalable and Unified Digit-Serial Processor Array Architecture for Multiplication and Inversion Over GF(2m)
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
New Systolic Array Architecture for Finite Field Inversion
IEEE CANADA
Design Space Exploration of 2-D Processor Array Architectures for Similarity Distance Computation
IEEE COMPUTER SOC
2019
Systolic Design Space Exploration of Polynomial Division over GF(3m)
SPRINGER INTERNATIONAL PUBLISHING AG
2018
New systolic array architecture for finite field division
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG